The invention relates to a power transistor and to a method of its manufacture. It can be applied to the manufacture of transistors made of semiconductor materials of a given type, made on a substrate of a different type, for example a transistor made of III-V material such as GaAs on a silicon substrate.
The epitaxial growth of GaAs on silicon offers major technological prospects in the field of power components.
The electrical performance values of transistors made of GaAs or III-V materials are well-known, but it is also known that gallium arsenide is costly and brittle, and that it is a poor conductor of heat. By contrast, silicon is relatively economical, less brittle and conducts heat well, but silicon transistors have electrical performance characteristics that are limited in frequency.
This opposition between the characteristics of GaAs and silicon has recently led to the making of the transistors in GaAs layer epitaxiated on a Si substrate: the transistor has the performance values of GaAs. It costs less in terms of semiconductor material, and the Si wafer is less brittle: hence the efficiency is greater.
This approach is promising for small-sized, low-noise transistors which dissipate little heat at the channel. It is hard to apply the approach to power transistors that dissipate more heat: for a transistor delivering one watt at the millimetrical frequencies, the region of the channel dissipates three watts. Now, the channel of the transistor always lies on an electrical semi-insulator layer, to prevent the current from leaking towards the Si substrate which is always electrically conductive: at best, it is highly resistive, for there is no known way of making electrically insulating Si. This layer of electrically insulating GaAs therefore also forms a heat barrier that counters the removal of the heat through the substrate Si.
According to a known technique for a GaAs transistor, on a GaAs substrate (made in a bulk structure), the heat is removed by the rear face, by means of holes that cross the entire thickness of the body of the transistor, and are filled with a metal. However, these holes are made at the cost of having to employ a complicated method to bond the wafer by its front face, or upper face, to a support, and then having to grind the GaAs substrate which is practically replaced by a metal heat sink, most usually made of gold.
With a "rear face" technology such as this, which is complicated to implement, the efficiency values obtained are often low (less than 50%).
Furthermore, it is difficult to adapt this technology to GaAs/Si transistors.
According to another known technique, one of the two regions providing access to the transistor, namely the source and the drain, is provided with a metallic heat well that goes through the GaAs layer or layers to come into contact with the silicon substrate and that also conducts the heat released in operation towards the silicon substrate which is a better heat conductor and dissipates the heat. However, this technique calls for a thick buffer layer of GaAs between the Si substrate and the active layer of GaAs. Thus, a significant part of the advantage given by the heat dissipation of the silicon is lost.
Finally, this technology of the GaAs/Si transistor makes it necessary to drill the GaAs layer at the conter of the source contact, so as to interconnect the sources through the very highly doped Si substrate. This so-called via-hole technology is relatively difficult to implement for a GaAs/Si structure.
The invention proposes a transistor structure different from known structures and a manufacturing method.
With respect to the manufacturing method, the French patent applications Nos. 88 04 437 and 88 04 438 describe a method of growing a layer of semiconductor material of a given type (GaAs for example), on another semiconductor (silicon for example), without defects.
Furthermore, the layer may have a modulation of doping along the plane of the layer as described in the French patent application No. 89 04 257.